S1C63656 4-bit single chip microcomputer original architecture core cpu low current consumption high speed operation in low voltage ? description the S1C63656 is a microcomputer which has a high-per formance 4-bit cpu s1c63000 as the core cpu, rom (6,144 words 13 bits), ram (1,024 words 4 bits), mult iply-divide circuit, serial interface, watchdog timer, programmable timer, time base counters (2 systems), an lcd driver that can drive a maximum 38 segments 4 commons, sound generator, r/f converter and stepping mo tor driver built-in. the S1C63656 features low current consumption, this makes it suitable for batte ry driven clocks and watches with temperature and humidity measurement functions. ? features osc1 oscillation circuit 32.768 khz (typ.) crystal oscillation circuit osc3 oscillation circuit 4 mhz (max.) ceramic (2 mhz max. when osc3 is used as the r/f converter operating clock), 1.1 mhz (typ.) cr oscillation circuit or not used (*1) instruction set basic instruction: 46 types (411 instructions with all) addressing mode: 8 types instruction execution time during operation at 32.768 khz: 61 sec 122 sec 183 sec during operation at 4 mhz: 0.5 sec 1 sec 1.5 sec rom capacity code rom: 6,144 words 13 bits data rom: 1,024 words 4 bits ram capacity data memory: 1,024 words 4 bits display memory: 48 words 4 bits input port 8 bits (pull-down resistors may be supplemented *1) output port 4 bits (it is possible to switch the 2 bits to special output *2) i/o port 8 bits (it is possible to switch the 4 bits to serial i/f input/output *2) serial interface 1 port (8 -bit clock synchronous system) lcd driver 38 segments 4 or 3 commons (*2) time base counter clock timer stopwatch timer (1/1000 sec, with direct key input function) programmable timer 8-bit pwm 2 ch. or 16-bit pwm 1 ch. (*2) watchdog timer built-in sound generator with envelope and 1-shot output functions r/f converter 2 ch., cr oscillation type, 20-bit counter supports resistive humidity sensors multiply-divide circuit 8-bit accumulator 1 ch. multiplication: 8 bits 8 bits -> 16-bit product division: 16 bits 8 bits -> 8-bit quotient and 8-bit remainder stepping motor driver 2 ch., a clock or watch controller can be implemented supply voltage detection (svd) criteria voltages: 1.85?2.90 v (1.13?1.64 v when osc3 is not used) are selectable (*2) external interrupt input port interrupt: 2 systems internal interrupt clock timer interrupt: 5 systems stopwatch timer interrupt: 4 systems programmable timer interrupt: 4 systems serial interface interrupt: 1 system r/f converter interrupt: 2 systems motor driver interrupt: 2 systems power supply voltage 2.4 to 3.6 v: max. 4 mhz operation (when osc3 is used) 1.1 to 3.6 v: 32 khz operation (when osc3 is not used) operating temperature range -20 to 70c
S1C63656 current consumption (typ.) low-speed operation (osc1 = 32 khz crystal oscillation): during halt 3.0 v (lcd on) 0.60 a during operation 3.0 v (lcd on) 2.50 a high-speed operation (osc3 ceramic oscillation): during operation 3.0 v (lcd on) 1.0 ma shipment form qfp20-144pin (plastic) or chip *1: can be selected with mask option *2: can be selected with software 2 seiko epson corporation
S1C63656 ? block diagram rom 6,144 words x 13 bits system reset control core cpu s1c63000 osc ram 1,024 words x 4 bits data rom 1,024 words x 4 bits lcd driver 38 seg x 4 com power controller svd sound generator stepping moter driver interrupt generator clock timer stopwatch timer programmable timer/counter input port serial interface i/o port output port r/f converter reset k00~k03 k10~k13 test p00~p03 p10~p13 r00~r03 sen0, sen1, hud ref0, ref1 rfin0, rfin1 rfout bo2 bo1 ao2 ao1 bz v ssa v ss ca~cb v osc v d1 v c1~3 v dda v dd seg0~37 com0~3 osc1 osc2 osc3 osc4 rom 6,144 words x 13 bits system reset control core cpu s1c63000 osc ram 1,024 words x 4 bits data rom 1,024 words x 4 bits lcd driver 38 seg x 4 com power controller svd sound generator stepping moter driver interrupt generator clock timer stopwatch timer programmable timer/counter input port serial interface i/o port output port r/f converter reset k00~k03 k10~k13 test p00~p03 p10~p13 r00~r03 sen0, sen1, hud ref0, ref1 rfin0, rfin1 rfout bo2 bo1 ao2 ao1 bz v ssa v ss ca~cb v osc v d1 v c1~3 v dda v dd seg0~37 com0~3 osc1 osc2 osc3 osc4 notice: no part of this material may be reproduced or duplicated in any fo rm or by any means without the written permission of seiko ep son. seiko epson reserves the right to make c hanges to this material without notice. se iko epson does not assume any liability of a ny kind arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, furt her, there is no representation that this material is app licable to products requiring high level reliab ility, such as, medical products. moreo ver, no license to any intellectual property rights is granted by implication or otherwise, and there is no representation or warranty that any thing made in accordance with this material will be free from any patent or copy right infringement of a third party. this material or portions thereof may contain technology or the subject relati ng to strategic products under the control of the foreign exchange and foreign trade la w of japan and may require an export license from the ministry of economy, trade and industry or other approval from another government ag ency. all brands or product names mentioned herein are trademarks and/ or registered trademarks of t heir respective companies. ? seiko epson corporation 2012, all rights reserved epson semiconductor website seiko epson corporation microdevices operations division http://www.epson.jp/device/semicon_e/ device sales & marketing department 421-8 hino, hino-shi, tokyo 191-8501, japan phone: +81-42-587-5814 fax: +81-42-587-5117 document code: 412299900 first issue feb, 2012 in j apan 3
|
